Although semiconductor transistors have largely replaced vacuum tubes, a modern-day version of vacuum tube technology, often referred to as vacuum microelectronics, may find wide application in high-power microwave tubes, flat-panel displays, and other devices.
In vacuum tubes, electrons are thermionically emitted from a hot cathode filament heated by a constant current flowing through it. In a diode, the electrons flow unidirectionally to an anode positively biased with respect to the cathode. In a triode or other gated tube, one or more grids are interposed between the cathode and anode, and small voltage signals applied to the grids have large effects on the current received by the anode. That is, the grid acts as a gate.
Electron field emitters rely on elements with very similar functions, but the cathode is not generally heated. Instead, it is usually formed with a very sharp tip. Then, a relatively small voltage applied between the cathode and anode produces very large electric fields adjacent to the sharp tip. The field is large enough to overcome the surface potential so that large numbers of electrons are emitted. Electron field emitters become particularly attractive because they can be fabricated in dense two-dimensional arrays. Thus, the current emitted from each tip may be small, but the total current may be very large. Furthermore, if a separate gate is provided for each emitter in such an array, a large array could be combined with a multi-color phosphorescent screen, similar to those found in present-day color televisions, to form a high-definition color flat-panel display. Integration of electron field emitters with plasma displays has also been proposed. Gated electron field emitters have other potential applications such as electron-beam writing machines and printers and high frequency amplifiers.
However, many technological problems must be overcome before displays utilizing such field emitters become commercially available. A method is known for making very sharp, but reproducible tips in crystalline silicon. See the technical article by Marcus et al. "Formation of silicon tips with &lt;1 nm radius," Applied Physics Letters, volume 56, 1990, pp. 236-238 and U.S. patent application, Ser. No. 07/551,771 filed Jul. 12, 1990, now abandoned in favor of Ser. No. 07/774,361, filed Oct. 8, 1991 by Andreadakis et al., incorporated herein by reference and on which U.S. Pat. Nos. 5,201,992 and 5,204,581 issued Apr. 13 and 20, 1993, respectively. This processing approach, however, suffers a disadvantage of relying upon crystalline silicon, which is satisfactory for arrays of relatively small area, but which is either unavailable or too expensive for flat-panel displays of even moderate size, for example, greater than 20 cm. Furthermore, to take advantage of the small tip sizes, the gates must be relatively closely aligned to the tips. The required alignment is easily achieved by photolithography for small arrays of emitters, but it becomes progressively more difficult when the lithography is extended over several tens of centimeters.
Spindt et al. have disclosed a process for self-aligning emitters in an array of gates in "Physical properties of thin-film field emission cathodes with molybdenum cones," Journal of Applied Physics, volume 47, 1976, pp. 5248-5263. However, this process is not only relatively complex, and therefore costly, but it also severely limits the freedom in forming the emitter tip.
Recently, Sokolich et al. have disclosed a process for self-aligning gates in an array of emitters in "Field emission from submicron emitter arrays," Proceedings IEDM, 1990, pp. 159-162. They deposit a silicon dioxide layer and a gate metal layer over emitter tips. The tip portion of the gate layer is removed using a planarizing photoresist, and the underlying silicon dioxide is partially etched beneath the metal to expose the tip. Bardai et al. have disclosed a similar process in U.S. Pat. No. 4,943,343. Recently also, Betsui has disclosed a self-aligned process in "Fabrication and characteristics of Si field emitter arrays," Technical Digest of IVMC, 1991, pp. 26-29. He deposits a mark to delineate the needle, and the mask is undercut during the sharpening. The cantilevered mask is then used as a shadow mask for deposition of both an insulator and a gate metal, thereby self-aligning the gate with the emitter.